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IMAGE SENSOR SOLUTIONS
DC Operating Conditions
SYMBOL
DESCRIPTION
MIN.
NOM.
MAX.
UNITS
PIN IMPEDANCE6
NOTES
VRD
Reset Drain
8.5
9
9.5
V
5pF, > 1.2M
Ω
IRD
Reset Drain Current
0.2
mA
VSS
Output Amplifier Return & OG
0
V
30pF, >1.2M
Ω
ISS
Output Amplifier Return Current
5
mA
VDD
Output Amplifier Supply
12
15.0
15.0
V
30pF, >1.2M
Ω
Iout
Output Bias Current
5
10
mA
5
WELL
P-well
----
0.0
----
V
Common
1
GND
Ground
-----
0.0
----
V
1
FDG
Fast Dump Gate
-7.0
-6.0
-5.5
V
20pF, >1.2M
Ω
2
SUB
Substrate
7
Vsub
15
V
1nF, >1.2M
Ω
3
IDHA, IDHB
Input Diode A, B Horizontal CCD
12.0
15.0
15.0
V
5pF, > 1.2M
Ω
4
Table 3 DC Operating Conditions
Notes:
1.
The WELL and GND pins should be connected to P-well ground.
2.
The voltage level specified will disable the fast dump feature.
3.
This pin may be pulsed to Ves=40V for electronic shuttering
4.
Electrical injection test pins. Connect to VDD power supply.
5.
Per output. Note also that Iout affects the bandwidth of the outputs.
6.
Pins shown with impedances greater than 1.2 Mohm are expected resistances. These pins are only verified to 1.2
Mohm.
7.
The operating levels are for room temperature operation. Operation at other temperatures may or may not require
adjustments of these voltages.
+15V
0.1
µ F
Vout
5mA
140
Ω
1 K
Ω
Buffered
Output
2N3904 or
equivalent
Figure 8 Recommended Output Structure Load Diagram
Cautions:
In order to obtain maximum device performance, gate protection is not provided. Extreme care must be
taken in handling to prevent electrostatic discharge which may permanently damage the device. Care must
be taken not to short the outputs to ground or VDD during operations.
KAI-1010/1011 Rev 8 •
www.k odak.com/go/imagers 585-722- 4385 imagers@kodak.com
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