CM1234 datasheet(2/10 Pages) CALMIRCO

2 / 10 page

490 N. McCarthy Blvd., Milpitas, CA 95035-5112

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Tel: 408.263.3214

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Fax: 408.263.7846

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www.cmd.com 4/24/2008

CM1234

Issue X-2

PicoGuard XS ESD Protection Archi-

tecture

Conceptually, an ESD protection device performs the

following actions upon an ESD strike discharge into a

protected ASIC (see

Figure 1):

When an ESD potential is applied to the system

under test (contact or air-discharge), Kirchoff’s

Current Law (KCL) dictates that the Electrical

Overstress (EOS) currents will immediately divide

throughout the circuit, based on the dynamic

impedance of each path.

Ideally, the classic shunt ESD clamp will switch

within 1ns to a low-impedance path and return the

majority of the EOS current to the chassis shield/

reference ground. In actuality, if the ESD compo-

nent's response time (tCLAMP) is slower than the

ASIC it is protecting, or if the Dynamic Clamping

Resistance (RDYN) is not significantly lower than

the ASIC's I/O cell circuitry, then the ASIC will have

to absorb a large amount of the EOS energy, and

be more likely to fail.

Subsequent to the ESD/EOS event, both devices

must immediately return to their original specifica-

tions, and be ready for an additional strike. Any

deterioration in parasitics or clamping capability

should be considered a failure, since it can then

affect signal integrity or subsequent protection

capability. (This is known as "multi-strike" capabil-

ity.)

In the CM1234 PicoGuard XS architecture, the signal

line leading the connector to the ASIC routes through

the CM1234 chip which provides 100

Ω matched

differential channel characteristic impedance that helps

optimize 100

Ω load impedance applications such as

the HDMI high speed data lines.

Note:When each of the channels are used individually

for single-ended signal lines protection, the indi-

vidual channel provides 50

Ω characteristic imped-

ance matching.

The load impedance matching feature of the CM1234

helps to simplify system designer’s PCB layout

considerations in impedance matching and also

eliminates associated passive components.

The route through the PicoGuard XS architecture

enables the CM1234 to provide matched impedance

for the signal path between the connector and the

ASIC. Besides this function, this circuit arrangement

also changes the way the parasitic inductance interacts

with the ESD protection circuit and helps reduce the

IRESIDUAL current to the ASIC.

Figure 1. Standard ESD Protection Device Block Diagram

Connector

I/O

ESD

PROTECTION

DEVICE

ASIC

ESD

Protection

Device

ESD Strike

IRESIDUAL

ISHUNT

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