RZSLASHN2L datasheet(2/128 Pages) RENESAS

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Overview

1.1

Outline of Specifications

The MPU is a high-performance ASSP that has Arm Cortex®-R52 processor with Floating-Point Unit (FPU) and NEON™.

It incorporates integrated peripheral functions necessary for system configuration.

Table 1.1

CPU

Feature

Functional description

Arm® Cortex®-R52

● Single processor

● Operating frequency

– 200 MHz/400 MHz (in case of 200 MHz system clock)

– 150 MHz/300 MHz (in case of 150 MHz system clock)

● 32-bit CPU Cortex-R52 designed by Arm (core revision r1p3)

● Address space: 4 GB

● Instruction cache

– 16 KB (with ECC)

● Data cache

– 16 KB (with ECC)

● Tightly coupled memory (TCM)

– ATCM: 128 KB (with ECC) 0 wait

– BTCM: 128 KB (with ECC) 0 wait

– CTCM: 0 KB (with ECC)

● Instruction set: Arm v8-R architecture, so support includes Thumb® and Thumb-2

● Data arrangement

– Instructions: Little endian

– Data: Little endian

● 2-stage memory protection unit (MPU)

FPU

● Supports addition, subtraction, multiplication, division, multiply-and-accumulate, and

square-root operations at single- and double-precision.

● Registers

64-bit single-word registers: 64 bits × 32

(can be used as 16 double-word registers: 128 bits × 16)

NEON

The Advanced SIMD supporting integer or single precision results

Table 1.2

Memory

Feature

Functional description

On-chip system SRAM with ECC

● Capacity: Up to 1.5 MB (512 KB × 3 units) (with ECC)

● Operating frequency: 150 MHz/200 MHz

● SEC-DED (single error correction/double error detection)

Error injection supported

One-time programmable memory

● Overwrite protection

● Redundancy support

● Available information

– Unique ID

– Authentication settings

– Trimming data

– Boot mode setting

– User area

Table 1.3

System (1 of 2)

Feature

Functional description

Operating modes

The operating mode can be selected from the following eight boot modes:

● xSPI0 boot mode (CS0 × 1 boot Serial Flash)

● xSPI0 boot mode (CS0 × 8 boot Serial Flash)

● 16-bit bus boot mode (CS0 NOR Flash)

● SHOSTIF boot mode

● PHOSTIF boot mode

● xSPI1 boot mode (CS0 × 1 boot Serial Flash)

● SCI boot mode

● USB boot mode

RZ/N2L Datasheet

1. Overview

R01DS0397EJ0140 Rev.1.40

Mar 31, 2026

Page 2 of 128

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