AS7341L datasheet(38/65 Pages) AMSOSRAM

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AS7341L

Datasheet

• PUBLIC

DS000718

• v1-00 • 2020-May-25

│ 37

AZ_CONFIG Register (Address 0xD6)

The following register configures how often the spectral engine offsets are reset (auto zero) to

compensate for changes of the device temperature. The typical time auto zero needs to be completed

is 15 ms.

Figure 48:

AZ_CONFIG Register

Addr: 0xD6

AZ_CONFIG

Bit

Bit Name

Default

Access

Bit Description

7:0

AZ_NTH_ITERATION

255

AUTOZERO FREQUENCY.

Sets the frequency at which the device performs auto

zero of the spectral engines.

Note: If

FDEN = “1” auto zero is also done for ADC 5.

VALUE

AUTOZERO FREQUENCY

Never (not recommended)

Every integration cycle

Every 2 cycles

…

Every “AZ_NTH_ITERATION” cycle

254

Every 254 cycles

255

Only before first measurement cycle

AGC_GAIN_MAX Register (Address 0xCF)

Figure 49:

AGC_GAIN_MAX Register

Addr: 0xCF

AGC_GAIN_MAX

Bit

Bit Name

Default

Access

Bit Description

7:4

reserved

3:0

AGC_AGAIN_MAX

AGC Gain Max.

Sets the maximum gain for AGC engine to

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Default value is 9 (256x). The range can be set from

0 (0.5x) to 10 (512x).

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