AS7225 datasheet(40/76 Pages) AMSOSRAM

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AS7225

Datasheet

• PUBLIC

DS000496

• v2-00 • 2019-Jun-28

│ 39

The registers create a 16-bit integer value from 0 to 65535 representing a PWM (Color + Dimming)

tuning percentage between 0.00 and 100.00%.

Example: 0001101001001111 = 1A4F = 6735 = 10.28%

Figure 40:

Director Channel_3 Result Register High

Addr: 0x66

DIR_CH_3_H

Bit

Bit Name

Default

Access

Bit Description

15:8

DIR_CH_3_H

00000000

Channel 3 high byte

CHAN_MODE 0 = Disabled

(0)

CHAN_MODE 1 = String1

complement

COLOR_TUNING

CHAN_MODE 2 = String 2

COLOR_TUNING incl.

dimming

Figure 41:

Director Channel_3 Result Register Low

Addr: 0x67

DIR_CH_3_L

Bit

Bit Name

Default

Access

Bit Description

7:0

DIR_CH_3_L

00000000

Channel 3 low byte

10.2.13

Director Target for LUX Registers (Addresses 0x70, 0x71)

These byte registers are used together as DIR_LUXT_H: DIR_LUXT_L.

They create a 16-bit integer value for LUX target.

Example: 0000001111101000 = 1000 LUX

Figure 42:

Director Target for LUX Register High

Addr: 0x70 (R/W)

DIR_LUXT_H

Bit

Bit Name

Default

Access

Bit Description

15:8

DIR_LUXT_H

00000000

R/W

Director target for LUX high

byte

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