DIO1298

Version 1.2, Apr 2026

www.dioo.com

© 2026 Dioo Microcircuits Co., Ltd. Jiangsu

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11.PCB Layout Recommendations

To support heavy load currents, a good PCB thermal design is essential. For DIO1298 EVB, it extends the

fill area for the IN, OUT, and GND copper planes to a total area of about 4 square inches for enhanced

thermal performance. Given the number of bumps on IN and OUT, these two planes are particularly

important and should not be overlooked. Additionally, adding back-side and/or buried-layer fill area with

thermal vias can significantly improve thermal performance.

Apart from thermal considerations, the PCB layout for the DIO1298 is relatively straightforward. Locate the

input and output capacitors in close proximity to the IC. Utilize the top-side copper layer to connect the

capacitor ground terminals together and to the GND pins. Route the control signals on buried layers. For

the internally set 33 V OVP, directly connect the OVLO pin to the GND pins.