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Os motores de busca de Datasheet de Componentes eletrônicos |
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Os motores de busca de Datasheet de Componentes eletrônicos |
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IS25LE01G-RILA3 Folha de dados(PDF) 38 Page - Integrated Silicon Solution, Inc |
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IS25LE01G-RILA3 Folha de dados(HTML) 38 Page - Integrated Silicon Solution, Inc |
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38 / 186 page  IS25LE01G IS25WE01G Integrated Silicon Solution, Inc.- www.issi.com 38 Rev. A6 01/14/2025 6.6.6 DATA LEARNING PATTERN REGISTER Related Commands: Read DLP (RDDLP 41h), Program Non-Volatile DLP Register (PNVDLR 43h), Write Volatile DLP Register (WRVDLR 4Ah). The Data Learning Pattern (DLP) resides in an 8-bit NON-Volatile Data Learning Register (NVDLR) as well as an 8-bit Volatile Data Learning Register (VDLR). When shipped from the factory, default value is 00h. A copy of the data pattern in NVDLR will also be written to the VDLR. The VDLR can be written to at any time, but on power cycles the data pattern will return back to data pattern in NVDLR. During Data Training phase, DLP will come from VDLR. Table 6.24 Non-Volatile Data Learning Register (NVDLR) Bit Name Definition Default Read- /Write Type 7:0 NVDLP Non-Volatile Data Learning Pattern: The value that may be transferred to the host during DDR read command latency (dummy) cycles to provide a training pattern to help the host more accurately center the data capture point in the received data bits. 00h R/W Non-Volatile Table 6.25 Volatile Data Learning Register (VDLR) Bit Name Definition Default Read- /Write Type 7:0 VDLP Volatile Data Learning Pattern: Volatile copy of the NVDLP used to enable and deliver the Data Learning Pattern to the outputs. The VDLP may be changed by the host during system operation. Takes the value of NVDLR during POR or Reset R/W Volatile |
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