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IS25LE01G-RILA3 Folha de dados(PDF) 165 Page - Integrated Silicon Solution, Inc

Nome de Peças IS25LE01G-RILA3
Descrição Electrónicos  SERIAL FLASH MEMORY 133/104MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE WITH ON-CHIP ECC
PDF  186 Pages
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Fabricante Electrônico  ISSI [Integrated Silicon Solution, Inc]
Página de início  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS25LE01G-RILA3 Folha de dados(HTML) 165 Page - Integrated Silicon Solution, Inc

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IS25LE01G
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Integrated Silicon Solution, Inc.- www.issi.com
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Rev. A6
01/14/2025
8.64 GANG SECTOR/BLOCK UNLOCK OPERATION (GBUN, 98h)
The Gang Sector/Block Unlock (GBUN) instruction provides a quick method to clear all DYB (Dynamic Protection
Bit)
bits to “1” at once.
Before the GBUN (98h) command can be accepted by the device, a Write Enable (WREN) command must be
issued and decoded by the device, which sets the Write Enable Latch (WEL) in the Status Register to enable any
write operations.
The sequence of issuing GBUN instruction is: drive CE# low → send GBUN instruction code → drive CE# high.
The instruction code will be shifted into the device on the rising edge of SCK.
The GBUN command is accepted in both SPI and QPI mode. The CE# must go high exactly at the byte boundary,
otherwise, the instruction will be ignored and not be executed. While the GBUN operation is in progress, the Status
Register may be read to check the value of the Write In Progress (WIP) bit. The WIP bi
t is “1” during the GBUN
operation, and is “0” when it is completed.
Figure 8.140 Gang Sector/Block Unlock Sequence In SPI Mode
Instruction = 98h
CE#
SCK
SI
0
1
2
3
4
5
6
7
Mode 3
Mode 0
SO
High Impedance
Figure 8.141 Gang Sector/Block Unlock Sequence In QPI Mode
98h
CE#
SCK
IO[3:0]
0
1
Mode 3
Mode 0



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