UCD3138064ARGCT.A datasheet(15/84 Pages) TI2

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UCD3138064A

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SLUSCA5B – DECEMBER 2015 – REVISED JANUARY 2017

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Specifications

(1)

Characterized by design and not production tested.

5.6

Timing Characteristics

V33A = V33D = V33DIO = 3.3 V; 1 μF from BP18 to DGND, TJ = –40 to 125 °C (unless otherwise noted)

PARAMETER

TEST CONDITION

MIN

TYP

MAX

UNIT

EADC DAC

Settling Time

From 10 to 90%

250

ADC12

ADC single sample conversion time (1)

ADC_SAMPLING_SEL= 6 or 0

3.9

μs

SYSTEM PERFORMANCE

Time to disable DPWM output based on

active FAULT pin signal

High level on FAULT pin

Retention period of flash content (data

retention and program)

TJ = 25 °C

100

years

Program time to erase one page or block

in data flash or program flash

Program time to write one word in data

flash or program flash

µs

Sync-in/sync-out pulse width

Sync pin

256

Flash Write

μs

POWER ON RESET AND BROWN OUT (V33D PIN, SEE Figure 5-4

tPOR

Time delay after Power is good or RESET*

relinquished

tEXC1

The time it takes from the device to exit a

reset state and begin executing program

flash bank 1 (32 kB). (1)

IRESET goes from a low state to a high state.

This is approximately equivalent to toggling the

external reset pin from low to high state.

9.5

tEXC2

The time it takes from the device to exit a

reset state and begin executing program

flash bank 2 (32 kB). (1)

IRESET goes from a low state to a high state.

This is approximately equivalent to toggling the

external reset pin from low to high state.

tEXCT

The time it takes from the device to exit a

reset state and begin executing the total

program flash (64 kB). (1)

IRESET goes from a low state to a high state.

This is approximately equivalent to toggling the

external reset pin from low to high state.

TEMPERATURE SENSOR (1)

tON

Turn on time / settling time of sensor

100

μs

ANALOG COMPARATOR

Time to disable DPWM output based on

0 V to 2.5 V step input on the analog

comparator. (1)

150

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