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UCD3138RHAR.A Folha de dados(PDF) 19 Page - Texas Instruments |
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UCD3138RHAR.A Folha de dados(HTML) 19 Page - Texas Instruments |
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19 / 99 page ![]() 8.7 Power Supply Sequencing TPOR undefined V33D IReset 3.3 V TPOR VGH VGL Vres t t Brown Out Figure 8-3. Power-On Reset (POR) and Brown-Out Reset (BOR) Table 8-2. Power-On Reset (POR) and Brown-Out Reset (BOR) Term Definitions TERM DEFINITION VGH This is the V33D threshold where the internal power is declared good. The UCD3138 comes out of reset when above this threshold. VGL This is the V33D threshold where the internal power is declared bad. The device goes into reset when below this threshold. Vres This is the V33D threshold where the internal reset signal is no longer valid. Below this threshold the device is in an indeterminate state. IReset This is the internal reset signal. When low, the device is held in reset. This is equivalent to holding the reset pin on the IC high. TPOR The time delay from when VGH is exceeded to when the device comes out of reset. Brown out This is the V33D voltage threshold at which the device sets the brown out status bit. In addition an interrupt can be triggered if enabled. 8.8 Peripherals 8.8.1 Digital Power Peripherals (DPPs) At the core of the UCD3138 controller are three DDPs. Each DPP can be configured to drive from one to eight DPWM outputs. Each DPP consists of: • Differential input error ADC (EADC) with sophisticated controls • Hardware accelerated digital 2-pole/2-zero PID based compensator • Digital PWM module with support for a variety of topologies These can be connected in many different combinations, with multiple filters and DPWMs. They are capable of supporting functions like input voltage feed forward, current mode control, and constant current/constant power, and so forth. The simplest configuration is shown in the following figure: www.ti.com UCD3138 SLUSAP2J – MARCH 2012 – REVISED NOVEMBER 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 19 Product Folder Links: UCD3138 |
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