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LM5109A

SNVS412C – APRIL 2006 – REVISED SEPTEMBER 2016

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Copyright © 2006–2016, Texas Instruments Incorporated

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

8.1 Application Information

To operate power MOSFETs at high switching frequencies and to reduce associated switching losses, a powerful

gate driver is employed between the PWM output of controller and the gates of the power semiconductor

devices. Also, gate drivers are indispensable when it is impossible for the PWM controller to directly drive the

gates of the switching devices. With the advent of digital power, this situation is often encountered because the

PWM signal from the digital controller is often a 3.3-V logic signal which cannot effectively turn on a power

switch. Level shift circuit is needed to boost the 3.3-V signal to the gate-drive voltage (such as 12 V) to fully turn

on the power device and minimize conduction losses. Traditional buffer drive circuits based on NPN and PNP

bipolar transistors in totem-pole arrangement prove inadequate with digital power because they lack level-shifting

capability. Gate drivers effectively combine both the level-shifting and buffer-drive functions. Gate drivers also

find other needs such as minimizing the effect of high-frequency switching noise (by placing the high-current

driver IC physically close to the power switch), driving gate-drive transformers and controlling floating power-

device gates, reducing power dissipation and thermal stress in controllers by moving gate charge power losses

from the controller into the driver.

The LM5109A is the high-voltage gate drivers designed to drive both the high-side and low-side N-channel

MOSFETs in a half-bridge configuration, full-bridge configuration, or in a synchronous buck circuit. The floating

high-side driver is capable of operating with supply voltages up to 90 V. This allows for N-channel MOSFETs

control in half-bridge, full-bridge, push-pull, two-switch forward and active clamp topologies. The outputs are

independently controlled. Each channel is controlled by its respective input pins (HI and LI), allowing full and

independent flexibility to control ON and OFF-time of the output.

8.1.1 HS Transient Voltages Below Ground

The HS node will always be clamped by the body diode of the lower external FET. In some situations, board

resistances and inductances can cause the HS node to transiently swing several volts below ground. The HS

node can swing below ground provided:

1. HS must always be at a lower potential than HO. Pulling HO more than –0.3V below HS can activate

parasitic transistors resulting in excessive current flow from the HB supply, possibly resulting in damage to

the IC. The same relationship is true with LO and VSS. If necessary, a Schottky diode can be placed

externally between HO and HS or LO and GND to protect the IC from this type of transient. The diode must

be placed as close to the IC pins as possible in order to be effective.

2. HB to HS operating voltage should be 15V or less. Hence, if the HS pin transient voltage is –5V, VDD should

be ideally limited to 10V to keep HB to HS below 15V.

3. Low ESR bypass capacitors from HB to HS and from VDD to VSS are essential for proper operation. The

capacitor should be located at the leads of the IC to minimize series inductance. The peak currents from LO

and HO can be quite large. Any series inductances with the bypass capacitor will cause voltage ringing at the

leads of the IC which must be avoided for reliable operation.