Time

with buffer

without Buffer

12

INA138, INA168

SBOS122E – DECEMBER 1999 – REVISED DECEMBER 2017

www.ti.com

Product Folder Links: INA138 INA168

Submit Documentation Feedback

Copyright © 1999–2017, Texas Instruments Incorporated

Typical Applications (continued)

Figure 10 illustrates this concept. Notice that a low pass filter is placed between the OPA340 output and the input

to the ADC. The filter capacitor is required to provide any instantaneous demand for current required by the input

stage of the ADC. The filter resistor is required to isolate the OPA340 output from the filter capacitor to maintain

circuit stability. The values for the filter components will vary according to the operational amplifier used for the

buffer and the particular ADC selected. More information can be found regarding the design of the low pass filter

in the TI Precision Design , 16 bit 1MSPS Data Acquisition Reference Design for Single-Ended Multiplexed

Applications (TIPD173).

Figure 11 shows the expected results when driving an analog-to-digital converter at 1MSPS with and without

buffering the INA1x8 output. Without the buffer, the high impedance of the INA1x8 reacts with the input

capacitance and sample and hold (S/H) capacitance of the ADC, and does not allow the S/H to reach the correct

final value before it is reset and the next conversion starts. Adding the buffer amplifier significantly reduces the

output impedance driving the S/H and allows for higher conversion rates than can be achieved without adding

the buffer.

8.2.1.3 Application Curve

Figure 11. Driving an ADC With and Without a Buffer