TFS7706H datasheet(25/42 Pages) POWERINT

25 / 42 page

Rev. B 04/15

TFS7701-7708

www.power.com

Figure 30. Design Example: 12 V / 15 A Main Output, 12 V, 0.83 A Standby.

14 - 25 V

STPS30L60CT

UF4005

µH

47 nF

50 V

47 nF

50 V

C10

1500

µF

16 V

C24

1500

µF

16 V

R21

3.3 k

Ω

R28

100

Ω

R30

1 k

Ω

R34

19.1 k

Ω

R31

4.99 k

Ω

LM431

R33

1 k

Ω

R32

10 k

Ω

SW1

Remote

ON/OFF

U3A

PC357A

R24

3.92 k

Ω

R15

1 k

Ω

R38

1 k

Ω

U1A

PC357A

15 k

Ω

R10

220

Ω

1 nF

100 V

UF4005

C19

1 nF

200 V

C20

330

µF

35 V

120

µF

450 V

R26

200

Ω

C17

1000

µF

16 V

C21

2.2 nF

250 VAC

U2A

PC357A

C16

330 nF

50V

C15

330

µF

25 V

C13

470 pF

100 V

U2B

PC357A

U1B

PC357A

R25

232 k

Ω

R27

232 k

Ω

R39

4.7 k

Ω

D10

BAV19WS

+380 VDC

J3-1

12 V Bias

J4-1

B-

J3-3

B-

J4-2

R14

1 k

Ω

100 nF

50 V

1N4007

4.7

Ω

1/2 W

2.2

Ω

1 W

3.5 A

D13

1N4005

R20

4.7 k

Ω

R16

7.5 k

Ω

R35

1.33 M

Ω

R13

1.33 M

Ω

R12

1.33 M

Ω

R23

619

Ω

R22

4.7 k

Ω

U3B

PC357A

100

Ω

1/2 W

R18

1.33 M

Ω

R19

1.33 M

R36

1.33 M

Ω

HiperTFS-2

TFS7703H

1N4007

D12

UF4003

D16

SB3100

9,10

7,8,9

10,11,12

+380 VDC

RTN

J5-3,4

RTN

J2-2

EF25

EE16

VDDH

DSB

PI-6999-110513

C12

µF

16 V

6,7

CONTROL

+12 V

Main

J5-1,2

+12 V

Standby

J2-1

R37

2.2

Ω

1 W

C22

3.3 nF

100 V

2.2

µH

2.2

Ω

1/2 W

C18

1 nF

200 V

2.2 nF

1 kV

47 nF

50 V

R11

39 k

Ω

MMBT4401

100 nF

50 V

Design Example

R13, R35. When the input voltage reaches 100 V VDC the

LINE-SENSE pin UV standby threshold is reached and the

standby converter turns on. After several milliseconds the

standby output will reach regulation and the primary V

AUX 14-25 V

bias will be stable. R16 (7.5 k

W) will provide bias current for the

operating current of the BYPASS pin to inhibit the internal

high-voltage current source to reduce zero-load consumption.

When the input bulk voltage reaches 336 VDC which is the UV

threshold for the main converter, the main converter will initiate

a turn-on sequence once the remote-on command from

secondary is activated. The remote-on switch (SW1) on the

secondary-side for this particular design allows the user to

manually activate that main converter by turning on the remote-

on optocoupler. In actual PC designs the remote-on would be

controlled by a computer start-up command.

This optocoupler sources 6 mA (set by R23) into the BYPASS

pin of the HiperTFS-2 which is greater than the threshold

current to start the turn-on sequence for the main converter.

The main converter will first turn on the bottom switch to allow

the high-side drive to receive the bootstrap bias. After 60 ms

the main converter will start switching both high-side and

low-side main switches at 132 kHz (set by the value of C12

which is 10

mF) and the main output voltage will rise. Once the

regulator U5 becomes active, current will flow through the

optocoupler U1. The collector of U1 will sink current out of the

FEEDBACK pin to adjust for appropriate duty cycle to maintain

regulation. The normal operating sink current is between 1 mA

and 2 mA. D9 provides bootstrap charging for the high-side

driver supply pin VDDH. R14 limits the current from the

bootstrap.

High-Efficiency +12 V, 15 A Main Output and 12 V, 0.83 A

The circuit in Figure 30 is an example of a design using

HiperTFS-2 providing a 180 W +12 V forward main converter

and a 10 W, 12 V standby output from the flyback controller of

HiperTFS-2. The very high integration of two full converters

within a single package immediately shows the result of very

low external parts count for the entire design. Both the main

converter and the flyback section of HiperTFS-2 are designed to

provide very high-efficiency.

The main converter takes advantage of the ability to operate

above 50% duty factor which lowers RMS switch currents and

allows using lower voltage more efficient Schottky diodes on

the output. The flyback standby section uses Power Integrations’

TinySwitch technology which is often used in designs that

demand high-efficiency and low no-load input power consumption.

The design in Figure 30 is intended to work with a PFC boost

front end that nominally provides a 385 VDC input. The main

converter will regulate to full load between 300 VDC and

385 VDC. This voltage range guarantees greater than 20 ms

hold-up time with C1 (120

mF). R27 selects the 650 mA standby

MOSFET current limit, and R25 selects the 3.24 A main converter

current limit. The standby section is designed to operate

whether the boost PFC stage is on or off. The standby

therefore is designed to operate from 100 VDC to 385 VDC

which covers the normal universal input of 90 VAC to 265 VAC.

The start-up sequence is initiated with HiperTFS-2 charging the

BYPASS pin capacitor via the internal high-voltage current

source. Current limit selection then follows via FEEDBACK pin

and ENABLE pin resistors. The HiperTFS-2 then senses the

input voltage via the LINE-SENSE pin resistor series chain R12,

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