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TFP403PZP.A Folha de dados(PDF) 9 Page - Texas Instruments |
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TFP403PZP.A Folha de dados(HTML) 9 Page - Texas Instruments |
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9 / 22 page ![]() TFP403 TI PanelBus™ DIGITAL RECEIVER SLDS125B − DECEMBER 2000 − REVISED MAY 2011 9 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION 80% 20% 80% 20% tr(2) tf(2) ODCK Figure 1. Rise and Fall Time of ODCK 80% 80% 20% 20% tr(1) tf(1) QE(0-23), QO(0-23), DE CTL(1-2), HSYNC, VSYNC Figure 2. Rise and Fall Time of Data and Control Signals f(ODCK) ODCK Figure 3. ODCK Frequency tsu(1) th(1) tsu(2) th(2) VOH VOL VOH VOL VOH VOL VOH VOL VOH VOL VOH VOL ODCK QE(0-23), QO(0-23), DE CTL(1-2), HSYNC, VSYNC OCK_INV Figure 4. Data Setup and Hold Time to Rising and Falling Edge of ODCK Figure 5. ODCK High to QE[23:0] Staggered Data Output Figure 6. Analog Input Intra-Pair Differential Skew 50% VOH td ODCK QE(O-23) 50% t(ps) Tx+ Tx- |
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