ELECTRICAL CHARACTERISTICS

PTH12020W/L

SLTS208I – MAY 2003 – REVISED MARCH 2009 ............................................................................................................................................................. www.ti.com

TA = 25°C, VI =12 V, VO = 1.8 V, CI = 560 µF, CO = 0 µF, and Io = Iomax (unless otherwise noted)

PTH12020L

PARAMETER

TEST CONDITIONS

UNIT

MIN

TYP

MAX

60°C, 200 LFM airflow

0

18(1)

IO

Output current

A

25°C, natural convection

0

18(1)

VI

Input voltage range

Over Io range

10.8

13.2

V

Votol

Set-point voltage tolerance

±2 (2)

%Vo

ΔRegtemp

Temperature variation

–40C <TA < 85°C

±0.5

%Vo

ΔRegline

Line regulation

Over VI range

±5

mV

ΔRegload

Load regulation

Over Io range

±5

mV

ΔRegtot

Total output variation

Includes set-point, line, load, –40°C

≤ TA ≤ 85°C

3 (2)

%Vo

ΔVadj

Output voltage adjust range

Over VI range

0.8

1.8

V

RSET = 130 Ω, Vo = 1.8 V

89%

RSET = 3.57 kΩ, Vo = 1.5 V

87%

η

Efficiency

IO = 12 A

RSET = 12.1 kΩ, Vo = 1.2 V

85%

RSET = 32.4 kΩ, Vo = 1.0 V

83%

RSET = open cct., Vo = 0.8 V

80%

Vr

Vo ripple (pk-pk)

20 MHz bandwidth

1

%Vo

Io trip

Over-current threshold

Reset, followed by auto-recovery

30

A

ttr

Recovery time

70

µSec

1 A/

µs load step, 50 to

Transient response

100% Iomax,Cout = 330 µF

ΔVtr

Vo over/undershoot

70

mV

ΔVomargin

Margin up/down adjust

±5%

IIL margin

Margin input current (pins 9 /10)

Pin to GND

–8(3)

µA

IIL track

Track input current (pin 8)

Pin to GND

–0.13(3)

mA

dVtrack/dt

Track slew rate capability

Cout ≤ Cout(max)

1

V/ms

VI increasing

9.7

10.4

UVLO

Undervoltage lockout

V

VI decreasing

8.8

9.2

VIH

Input high voltage, Referenced to GND

Open(4)

V

VIL

Inhibit control (pin 3)

Input low voltage, Referenced to GND

–0.2

0.5

IIL

Input low current, Pin 3 to GND

0.24

mA

II

Input standby current

Inhibit (pin 3) to GND, Track (pin 8) open

5

mA

ƒs

Switching frequency

Over VI and Io ranges

200

250

300

kHz

CI

External input capacitance

560(5)

F

Non-ceramic

0

330 (6)

9900 (7)

Capacitance value

µF

CO

External output capacitance

Ceramic

0

300

Equivalent series resistance (non-ceramic)

4(8)

m

Ω

MTBF

Reliability

Per Bellcore TR-332, 50% stress, TA = 40°C, ground benign

5.3

106 Hrs

(1)

See SOA curves or consult factory for appropriate derating.

(2)

The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a

tolerance of 1%, with 100 ppm/°C or better temperature stability.

(3)

A small low-leakage (<100 nA) MOSFET is recommended to control this pin. The open-circuit voltage is less than 1 Vdc.

(4)

This control pin is pulled up to an internal supply voltage. If this input is left open-circuit the module will operate when input power is

applied. A small low-leakage (<100 nA) MOSFET or open-drain/collector voltage supervisor IC is recommended for control. Do not place

an external pull-up on this pin. For further information, consult the related application note.

(5)

A 560

µF electrolytic input capacitor is required for proper operation. The capacitor must be rated for a minimum of 800 mA rms of ripple

current.

(6)

An external output capacitor is not required for basic operation. Adding 330

µF of distributed capacitance at the load will improve the

transient response.

(7)

This is the calculated maximum. The minimum ESR limitation will often result in a lower value. When controlling the Track pin using a

voltage supervisor, the maximum output capacitance is reduced to 6600

µF. Consult the application notes for further guidance.

(8)

This is the typical ESR for all the electrolytic (non-ceramic) output capacitance. Use 7 m

Ω as the minimum when using max-ESR values

to calculate.

4

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