6.6 Timing and Switching Characteristics

6.6.1 Power Supply Requirements

This section describes the power supply requirements to ensure proper device operation.

Note

All power balls must be supplied with the voltages specified in the Recommended Operating

Conditions section.

6.6.1.1 Power Supply Sequencing

This section describes the device power sequence requirements for the VDDS_MEM_1P1 and

VDDS_MEM_1P8 power rails relative to the other device power rails, which have been defined in the Power-Up

Sequencing and Power-Down Sequencing sections of the AM62x Sitara Processors Datasheet.

The VDDS_MEM_1P1 power rail should be sourced from the same power supply that is sourcing VDDS_DDR.

Therefore, the VDDS_MEM_1P1 power rail should ramp up and down with the power rails associated with

waveform E.

The VDDS_MEM_1P8 power rail should ramp up and down with the power rails associated with waveform C.

For additional power sequence requirement details associated with the integrated LPDDR4 SDRAM, see the

Integrated Silicon Solution (ISSI®) IS43/46LQ16256B Datasheet .

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AM625SIP

SPRSP98A – NOVEMBER 2023 – REVISED JUNE 2024

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