20 / 60 page
IP175A LF
Preliminary Data Sheet
20/60
February 20, 2006
Copyright © 2004, IC Plus Corp.
IP175A LF-DS-R08
4.2
Router application
IP175A LF supports two MII ports, MII0 and MII1, for router application when P4EXT is pulled high. Pin
P4_FORCE, P4_FORCE100 and P4_FORCE_FULL decide the speed and duplex of MII0. The speed
and duplex of MII1 depend on the result of auto-negotiation of PHY4. But, programming basic MII
registers through SMI can modify them. MAC_X_EN pin decides the flow control option of MII0. It is
illustrated in the following table.
MII0
P4EXT MAC_X_EN P4_FORCE P4_FORCE100 P4_FORCE_FULL
Speed
Duplex
Flow
control
0
X
X
X
X
MII0 disabled.
1
0
1
1
1
100M
Full
Off
1
0
1
1
0
100M
Half
Off
1
0
1
0
1
10M
Full
Off
1
0
1
0
0
10M
Half
Off
1
1
1
1
1
100M
Full
On
1
1
1
1
0
100M
Half
On
1
1
1
0
1
10M
Full
On
X: “don’t care”
IP175A LF can work as a router with 4 LAN ports and one WAN port, which use internal PHY (PHY4).
MII0 is the interface between port4 of internal switch controller and external MAC. MII1 is the interface
between internal transceiver PHY4 and external MAC. The switch controller forwards frames from
port0~3 to MII0 and vice versa. PHY4 works as an independent single PHY for external MAC. MII0 works
at PHY mode in this application (MII_MAC_MOD=0).
MII0
M II1
W A N port
LA N port
PH Y
0
PH Y
1
PH Y
2
PH Y
3
PH Y
4
IP 175A LF
MA C
MA C
CP U
(P H Y m ode)
(L A N )
(W A N )
port 0
port 1
port 2
port 3
port 4
sw itch co n tro lle r
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