7 Detailed Description

7.1 Overview

The CD74HC365-Q1, CD74HC366-Q1, and CD74HCT365-Q1 silicon gate CMOS three state buffers are

general purpose high-speed non-inverting and inverting buffers. They have high drive current outputs which

enable high speed operation even when driving large bus capacitances. These circuits possess the low power

dissipation of CMOS circuitry, yet have speeds comparable to low power Schottky TTL circuits. Both circuits are

capable of driving up to 15 low power Schottky inputs.

The CD74HC365-Q1 and CD74HCT365-Q1 are non-inverting buffers, whereas the CD74HC366-Q1 is an

inverting buffer. These devices have two three-state control inputs (OE1 and OE2) which are NORed together to

control all six gates.

The ’HCT365-Q1 logic families are speed, function and pin compatible with the standard LS logic family.

7.2 Functional Block Diagram

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CD74HC365-Q1, CD74HC366-Q1, CD74HCT365-Q1

SCHS382A – JANUARY 2010 – REVISED AUGUST 2022

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Product Folder Links: CD74HC365-Q1 CD74HC366-Q1 CD74HCT365-Q1