ESP32-PICO datasheet(24/64 Pages) ESPRESSIF

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3 Boot Configurations

any other way. It makes the strapping pin values available during the entire chip operation, and the pins are

freed up to be used as regular IO pins after reset.

The timing of signals connected to the strapping pins should adhere to the setup time and hold time

specifications in Table 9 and Figure 5.

Table 9: Description of Timing Parameters for the Strapping Pins

Parameter

Description

Min (ms)

tSU

Setup time is the time reserved for the power rails to stabilize be-

fore the CHIP_PU pin is pulled high to activate the chip.

Hold time is the time reserved for the chip to read the strapping

pin values after CHIP_PU is already high and before these pins

start operating as regular IO pins.

Strapping pin

VIL_nRST

VIH

tSU

CHIP_PU

Figure 5: Visualization of Timing Parameters for the Strapping Pins

3.1

Chip Boot Mode Control

GPIO0 and GPIO2 control the boot mode after the reset is released. See Table 10 Chip Boot Mode

Control.

Table 10: Chip Boot Mode Control

Boot Mode

GPIO0

GPIO2

SPI Boot Mode

Any value

Joint Download Boot Mode 2

1 Bold marks the default value and configuration.

2 Joint Download Boot mode supports the following

download methods:

• SDIO Download Boot

• UART Download Boot

In Joint Download Boot mode, the detailed boot flow of the chip is put below 6.

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ESP32-PICO Series Datasheet v1.1

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