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TMPR3911 Folha de dados(PDF) 97 Page - Toshiba Semiconductor

Nome de Peças TMPR3911
Descrição Electrónicos  32-Bit TX System RISC TX39 Family
PDF  462 Pages
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Fabricante Electrônico  TOSHIBA [Toshiba Semiconductor]
Página de início  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMPR3911 Folha de dados(HTML) 97 Page - Toshiba Semiconductor

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Chapter 3 CPU Module
3-13
3.3.6.9
Virtual Address Translation
During virtual-to-physical address translation, the TX39/H compares PID and the highest 20
bits (the VPN) of the virtual address to the contents of the TLB. Figure 3.3.7 illustrates the TLB
address translation process.
A virtual address matches a TLB entry when the virtual page number (VPN) field of the virtual
address equals the VPN field of the entry, and either the Global (G) bit of the TLB entry is set, or
the process identifier (PID) field of the virtual address (as held in the EntryHi register) matches
the PID field of the TLB entry. While the Valid (V) bit of the entry must be set for a valid
translation to take place, it is not involved in the determination of a matching TLB entry.
If a TLB entry matches, the physical address and access control bits (N, D, and V) are retrieved
from the matching TLB entry. Otherwise, a TLB miss (or UTLB miss) exception occurs. If the
access control bits (D and V) indicate that the access is not valid, a TLB modification or TLB miss
exception occurs. If the N bit is set, the physical address that is retrieved is used to access main
memory, bypassing the cache.



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