TDA9935 datasheet(8/18 Pages) NXP

8 / 18 page

TDA9935_4

Product data sheet

Rev. 04 — 17 September 2007

8 of 18

NXP Semiconductors

TDA9935

Dual 14-bit, up to 160 Msample/s, 2

× interpolating DAC

10. Characteristics

Table 5.

Characteristics

VCCD =VCCA = 3.0 V to 3.6 V; AGND and DGND connected together; Tamb = −40 °C to +85 °C; typical values measured at

VCCD =VCCA = 3.3 V, IO(FS) = 20 mA and Tamb =25 °C; dynamic parameters measured using output schematic given in

Figure 10; unless otherwise speciﬁed.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Supplies

VCCD

digital supply voltage

3.0

3.3

3.6

VCCA

analog supply voltage

3.0

3.3

3.6

ICCD

digital supply current

ICCA

analog supply current

Ptot

total power dissipation

fCLK = 80 Msample/s;

fIOUT =fQOUT = 5 MHz

422

540

Clock inputs (CLK and CLKN)

VI(CM)

common mode input

voltage

1.65

∆VCLK

differential input voltage

swing

1.0

Analog outputs (IOUT, IOUTN, QOUT and QOUTN)

IO(FS)

full-scale output current

differential outputs

output resistance

[1] -

150

Ω

output capacitance

[1] -3

-pF

Digital inputs (I0 to I13, Q0 to Q13 and GAPD)

VIL

LOW-level input voltage

DGND

0.3VCCD V

VIH

HIGH-level input voltage

0.7VCCD -VCCD

IIL

LOW-level input current

VIL = 0.3VCCD

-5

µA

IIH

HIGH-level input current

VIH = 0.7VCCD

-5

µA

Reference voltage output (GAPOUT)

VGAPOUT

output voltage

1.31

IGAPOUT

output current

external voltage

µA

∆VGAPOUT output voltage drift

±133

ppm/

°C

Clock timing inputs (CLK and CLKN)

fCLK(max)

maximum clock rate

Msample/s

tW(CLKH)

clock HIGH pulse width

tW(CLKL)

clock LOW pulse width

Input timing (I0 to I13 and Q0 to Q13); see Figure 5

th(i)

input hold time

1.1

3.4

tsu(i)

input setup time

−1.5

+0.7

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