Dir. Slave Read

FIFOs

PCI Bus

State

Machines

Local Bus

State

Machines

Local Bus

Interface

– Dynamic Bus

Width (8-, 16-,

or 32-bit)

– Endian

Conversion

– Muxed or

non-Muxed

Address/Data

Buses

Control Logic

PCI Master

(For DMA

Ch 0/1 Xfers)

PCI Master

(For Direct

Master Xfers)

Local Slave

(For Direct

Master Xfers)

Local Master

(For DMA

Ch 0/1 Xfers)

Direct Slave

DMA

PCITarget

(For Direct

Slave Xfers)

DMA Channel 0

DMA Channel 1

Direct Master Write

Direct Master Read

Direct SlaveRead

Local Master

(For Direct

Slave Xfers)

Con guration

Registers

PCI Bus

Local Bus

DMA

Run-Time

PCI Bus

Interface

PCI

Arbiter

Direct Master

EEPROM

Interrupts

Power Management

Hot Swap

Direct Slave Write

Serial EEPROM

– User-speci ed

register

initialzation

values

–Vital Product

Data

PLX Technology, Inc.

870 Maude Ave.

Sunnyvale, CA 94085 USA

Tel: 1-800-759-3735

Tel: 1-408-774-9060

Fax: 1-408-774-2169

Email: info@plxtech.com

Web Site: www.plxtech.com

© 2002 by PLX Technology, Inc. All rights reserved. PLX and Data Pipe Architecture are trademarks of PLX Technology, Inc. All oth

er product names that appear in this material are for identication purposes only and are acknowledged to be

trademarks or registered trademarks of their respective companies. Information supplied by PLX is believed to be accurate and r

eliable, but PLX Technology, Inc. assumes no responsibility for any errors that may appear in this material. PLX

Technology, Inc. reserves the right, without notice, to make changes in product design or specication.

PLX recognizes that software often repre-

sents the largest investment in development.

The PCI 9656 is fully compliant with PLX’s

SDK-LITE and SDK-PRO which enable quick

and easy development of high performance

local processor and host PCI software

through standard APIs, I 2O messaging pro-

tocols, PCI debug tools, and sample drivers.

Product Ordering Information

64-bit, 66 MHz PCI Bus Mastering I/O Accelerator for PowerQUICC

PCI 9656-BA66BI G

and Generic 32-bit, 66MHz Bus Based Designs (Lead-Free)

64-bit, 66 MHz PCI Bus Mastering I/O Accelerator for PowerQUICC

PCI 9656-BA66BI

and Generic 32-bit, 66MHz Bus Based Designs

CompactPCI 9656RDK-860

CompactPCI 9656 Rapid Development Kit with Motorola MPC860

PowerQUICC CPU and communications channels

SDK-LITE

Windows Host-Side Software Development Kit

for PLX I/O Accelerators and I/O Processors

SDK-PRO

Windows Host-Side and Local-Side Software Development Kit

for PLX I/O Accelerators and I/O Processors

PCI 9656RDK-LITE

PCI 9656 Rapid Development Kit with prototyping area

for generic Local Bus designs

Development Tools Support

To minimize risk and lower your product

development costs, PLX oers Software

Development Kits (SDKs) and Rapid

Development Kits (RDKs) that support the

PCI 9656. These kits enable designers to

quickly bring new designs to production.

PCI 9656 design support is provided

through RDKs that include a robust PCI

development platform, complete with

OrCAD schematics, documentation, a

PCI 9656 chip sample, and software.

9656-SIL-PB-P1-1.0

2/02 3K

PCI 9656 Internal Block Diagram