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EMC2101-R-ACZL-TR Folha de dados(PDF) 7 Page - Microchip Technology |
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EMC2101-R-ACZL-TR Folha de dados(HTML) 7 Page - Microchip Technology |
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7 / 56 page ![]() 2022 Microchip Technology Inc. and its subsidiaries DS20006703A-page 7 EMC2101 2.0 SYSTEM MANAGEMENT BUS INTERFACE PROTOCOL 2.1 System Management Bus Interface Protocol The EMC2101 communicates with a host controller through the SMBus. The SMBus is a two-wire serial communication protocol between a computer host and its peripheral devices. A detailed timing diagram is shown in Figure 2-1. Stretching of the SMCLK signal is supported, however the EMC2101 does not stretch the clock signal The EMC2101 powers up as an SMBus client (after loading from EEPROM as applicable). FIGURE 2-1: SMBus Timing Diagram. The EMC2101 is SMBus 2.0 compatible and supports Send Byte, Read Byte, Write Byte, Receive Byte and the Alert Response Address as valid protocols, as shown below. All of the protocols below use the convention in Table 2-1. TABLE 2-1: PROTOCOL FORMAT Data Sent to Device Data Sent to the Host # of bits sent # of bits sent |
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