ADIS16IMU5SLASHPCBZ datasheet(43/46 Pages) AD

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Data Sheet

ADIS16575/ADIS16576/ADIS16577

APPLICATIONS INFORMATION

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Rev. 0 | 43 of 46

ASSEMBLY AND HANDLING TIPS

Mounting Tips

The ADIS16575/ADIS16576/ADIS16577 package supports installa-

tion onto a PCB or rigid enclosure using three M2 or 2-56 machine

screws, with a recommended torque between 20 inch ounces and

40 inch ounces. The devices feature three mounting holes located

at three corners of the package, as well as two smaller alignment

holes. These alignment holes, positioned near the top right and

bottom left corners, aid in precise positioning during installation.

Figure 74. Mating Connector Design Detail

When designing a mechanical interface for the ADIS16575/

ADIS16576/ADIS16577, use the alignment holes to ensure accu-

rate placement and avoid placing unnecessary translational stress

on the electrical connector because it can influence the bias repeat-

ability behaviors of the inertial sensors.

For installations where the mating PCB also includes the electrical

connector, pass-through holes for the mounting screws may be

required. Figure 74 provides a detailed view of the PCB pad design

when using one of the connector variants in the CLM-107-02 family.

Figure 75 shows the top view of the ADIS16575/ADIS16576/

ADIS16577, showing mounting screw holes and alignment holes.

Figure 75. Mounting and Alignment Holes

POWER SUPPLY CONSIDERATIONS

The ADIS16575/ADIS16576/ADIS16577 contain 11.5 µF of decou-

pling capacitance across the VDD and GND pins. When the VDD

voltage rises from 0 V to 3.3 V, the charging current for this

capacitor bank imposes the following current profile (in amperes):

IDDt =CdVDDtdt =11.5 × 10−6 ×

dVDDtdt

where:

IDD(t) is the current demand on the VDD pin during the initial power

supply ramp with respect to time.

C is the internal capacitance across the VDD and GND pins (11.5

µF).

VDD(t) is the voltage on the VDD pin with respect to time.

For example, if VDD follows a linear ramp from 0 V to 3.3 V

in 66 µs, the charging current is 575 mA for that time frame.

The ADIS16575/ADIS16576/ADIS16577 also contain embedded

processing functions that present transient current demands during

initialization or reset recovery operations. During these processes,

the peak current demand reaches 250 mA and occurs approximate-

ly 80 ms after VDD reaches 3.0 V (or ~80 ms after initiating a reset

sequence).

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