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SSM2602CPZ-R21 Folha de dados(PDF) 11 Page - Analog Devices |
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SSM2602CPZ-R21 Folha de dados(HTML) 11 Page - Analog Devices |
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11 / 28 page ![]() Preliminary Technical Data SSM2602 Rev. PrB | Page 11 of 28 ANALOG INTERFACE Microphone Input High impedance input MIC TBD Headphone Output TBD Sidetone Insertion TBD DIGITAL AUDIO INTERFACE The digital audio input can support various communication protocols: • Right justified • Left justified • I2S mode • Digital-signal processor (DSP) mode The mode selection is performed by writing to the FORMAT [1:0] bits of the digital audio interface register (Register R7). All modes are MSB first and operate with data of 16 to 32 bits. ADCLRC/ DACLRC BCLK ADCDAT/ DACDAT 1 234 NN 1 2 LEFT CHANNEL 3 RIGHT CHANNEL 1/ fS Figure 14. Left-Justified Audio Interface ADCLRC/ DACLRC BCLK ADCDAT/ DACDAT N 4 321 1 N LEFT CHANNEL 2 3 RIGHT CHANNEL 4 1/ fS Figure 15. Right-Justified Audio Interface ADCLRC/ DACLRC BCLK ADCDAT/ DACDAT 12 34 N N 1 2 LEFT CHANNEL 3 RIGHT CHANNEL 1/ fS Figure 16. I2S Audio Interface |
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