AD8132ARZ-R7 datasheet(24/32 Pages) AD

24 / 32 page

AD8132

Rev. I | Page 24 of 32

When using the AD8132 in gain configurations where β1 ≠ β2,

differential output noise appears due to input-referred voltage

noise in the VOCM circuitry according to the following formula:

In cases where more accurate control of the output common-mode

level is required, it is a best practice that an external source or

resistor divider (with RSOURCE < 10 kΩ) be used. The output

common-mode offset values in the Specifications section assume

the VOCM input is driven by a low impedance voltage source.

⎥

⎦

⎤

⎢

⎣

⎡

−

β2

β1

β2

β1

NOCM

OND

DRIVING A CAPACITIVE LOAD

where:

VOND is the output differential noise.

VNOCM is the input-referred voltage noise on VOCM.

A purely capacitive load can react with the pin and bond wire

inductance of the AD8132, resulting in high frequency ringing

in the pulse response. One way to minimize this effect is to place a

small capacitor across each of the feedback resistors. The added

capacitance must be small to avoid destabilizing the amplifier. An

alternative technique is to place a small resistor in series with

the amplifier outputs, as shown in Figure 60.

CALCULATING INPUT IMPEDANCE OF THE

APPLICATION CIRCUIT

The effective input impedance of a circuit, such as that in Figure 64,

at +DIN and −DIN, depends on whether the amplifier is being

driven by a single-ended or differential signal source. For balanced

differential input signals, the input impedance (RIN, dm) between

the inputs (+DIN and −DIN) is simply

OPEN-LOOP GAIN AND PHASE

Open-loop gain and phase plots are shown in Figure 65 and

Figure 66.

RIN, dm = 2 × RG

–20

–10

0.1

100

1000

FREQUENCY (MHz)

RL, dm = 2kΩ

In the case of a single-ended input signal (for example, if −DIN

is grounded and the input signal is applied to +DIN), the input

impedance becomes

()⎟

⎟

⎠

⎞

⎜

⎝

⎛

−

IN,

The circuit input impedance is effectively higher than it would

be for a conventional op amp connected as an inverter because

a fraction of the differential output voltage appears at the inputs

as a common-mode signal, partially bootstrapping the voltage

across the input resistor, RG.

Figure 65. Open-Loop Gain vs. Frequency

INPUT COMMON-MODE VOLTAGE RANGE IN

SINGLE-SUPPLY APPLICATIONS

–200

–180

–160

–140

–120

–100

–80

–60

–40

–20

0.1

100

1000

FREQUENCY (MHz)

RL, dm = 2kΩ

The AD8132 is optimized for level-shifting, ground-referenced

input signals. For a single-ended input, this implies that the voltage

at −DIN in Figure 64 is 0 V when the negative power supply

voltage (at V−) of the amplifier is also set to 0 V.

SETTING THE OUTPUT COMMON-MODE VOLTAGE

The VOCM pin of the AD8132 is internally biased at a voltage

approximately equal to the midsupply point (average value of the

voltage on V+ and V−). Relying on this internal bias results in an

output common-mode voltage that is within approximately

100 mV of the expected value.

Figure 66. Open-Loop Phase vs. Frequency

AD8132ARZ-R7 Folha de dados(PDF) 24 Page - Analog Devices

AD8132ARZ-R7 Folha de dados(HTML) 24 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

Folha de dados Download

Ligação URL