STPM01FTR datasheet(16/56 Pages) STMICROELECTRONICS

16 / 56 page

Theory of operation

STPM01

16/56

The maximum differential input voltage is dependent on the selected gain according to the

following table.

The gain register is included in the Device Configuration Register with the address names

PST and ADDG. The table below shows the gain configuration according to the register

values:

Both the voltage and current channels implement an active offset correction architecture

which gives the benefit to avoid any offset compensation.

The analog voltage and current signals are processed by the

∑∆ Analog to digital converters

that feed the hardwired DSP. The DSP implements an automatic digital offset cancellation

that make possible avoiding any manual offset calibration on the analog inputs.

Table 8.

Gain of voltage and current channels

Voltage channels

Current channels

Gain

Max Input voltage (V)

Gain

Max input voltage (V)

±0.30

±0.15

16X

±0.075

24X

±0.05

32X

±0.035

Table 9.

Configuration of current sensors

Primary

Secondary

Configuration Bits

Gain

Sensor

Gain

Sensor

PST (3 bits)

ADDG (1 bit)

Rogowsky Coil

Disabled (No Tamper)

8CT

Shunt

Rogowsky Coil

8CT6

Shunt

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