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MPC8541ECPXALF Folha de dados(PDF) 44 Page - Freescale Semiconductor, Inc |
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MPC8541ECPXALF Folha de dados(HTML) 44 Page - Freescale Semiconductor, Inc |
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44 / 84 page  MPC8541E PowerQUICC™ III Integrated Communications Processor Hardware Specifications, Rev. 4 44 Freescale Semiconductor CPM Figure 26 shows the SPI 1,2external clock. Figure 26. SPI AC Timing External Clock Diagram Figure 27 shows the SPI 1,2 internal clock. Figure 27. SPI AC Timing Internal Clock Diagram 1 SPI AC timings are internal mode when it is master since SPICLK is an output, and external mode when it is slave. 2 SPI AC timings refer always to SPICLK. Figure 28. PIO Signal Diagram Serial CLKIN tNEIXKH tNEIVKH tNEKHOX Input Signals: (See Note) Output Signals: (See Note) Note: SPI SPI The clock edge is selectable on SPI. BRG_OUT tNIIXKH tNIKHOX Input Signals: (See Note) Output Signals: (See Note) Note: tNIIVKH SPI SPI The clock edge is selectable on SPI. Sys clk PIO inputs PIO outputs tPIIVKH tPIIXKH tPIKHOX |
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