MC68HC908AS32AMFN datasheet(35/280 Pages) FREESCALE

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Vector Addresses and Priority

MC68HC908AS32A Data Sheet, Rev. 2.0

Freescale Semiconductor

$002D

TIM Channel 2 Register High

(TCH2H)

See page 243.

Read:

Bit 15

Bit 8

Write:

Reset:

Indeterminate after reset

$002E

TIM Channel 2 Register Low

(TCH2L)

See page 243.

Read:

Bit 7

54321

Bit 0

Write:

Reset:

Indeterminate after reset

$002F

TIM Channel 3 Status and

Control Register (TSC3)

See page 240.

Read:

CH3F

CH3IE

MS3A

ELS3B

ELS3A

TOV3

CH3MAX

Write:

Reset:

00000000

$0030

TIM Channel 3 Register High

(TCH3H)

See page 243.

Read:

Bit 15

Bit 8

Write:

Reset:

Indeterminate after reset

$0031

TIM Channel 3 Register Low

(TCH3L)

See page 243.

Read:

Bit 7

54321

Bit 0

Write:

Reset:

Indeterminate after reset

$0032

TIM Channel 4 Status and

Control Register (TSC4)

See page 240.

Read:

CH4F

CH4IE

MS4B

MS4A

ELS4B

ELS4A

TOV4

CH4MAX

Write:

Reset:

00000000

$0033

TIM Channel 4 Register High

(TCH4H)

See page 243.

Read:

Bit 15

Bit 8

Write:

Reset:

Indeterminate after reset

$0034

TIM Channel 4 Register Low

(TCH4L)

See page 243.

Read:

Bit 7

54321

Bit 0

Write:

Reset:

Indeterminate after reset

$0035

TIM Channel 5 Status and

Control Register (TSC5)

See page 240.

Read:

CH5F

CH5IE

MS5A

ELS5B

ELS5A

TOV5

CH5MAX

Write:

Reset:

00000000

$0036

TIM Channel 5 Register High

(TCH5H)

See page 243.

Read:

Bit 15

Bit 8

Write:

Reset:

Indeterminate after reset

$0037

TIM Channel 5 Register Low

(TCH5L)

See page 243.

Read:

Bit 7

54321

Bit 0

Write:

Reset:

Indeterminate after reset

$0038

ADC Status and Control

See page 63.

Read:

COCO

AIEN

ADCO

ADCH4

ADCH3

ADCH2

ADCH1

ADCH0

Write:

Reset:

00000000

$0039

ADC Data Register

(ADR)

See page 65.

Read:

AD7

AD6

AD5

AD4

AD3

AD2

AD1

AD0

Write:

RRRRRR

Reset:

Indeterminate after reset

Addr.

Bit 7

54321

Bit 0

= Unimplemented

= Reserved

U = Unaffected

Figure 2-2. I/O Data, Status and Control Registers (Sheet 5 of 6)

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