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DSP56857E Folha de dados(PDF) 39 Page - Freescale Semiconductor, Inc |
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DSP56857E Folha de dados(HTML) 39 Page - Freescale Semiconductor, Inc |
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39 / 53 page ![]() Enhanced Synchronous Serial Interface (ESSI) Timing 56857 Technical Data, Rev. 6 Freescale Semiconductor 39 Figure 4-26 Master Mode Timing Diagram Table 4-12 ESSI Slave Mode1 Switching Characteristics Operating Conditions: VSS = VSSIO = VSSA = 0 V, VDD = 1.62-1.98V, VDDIO = VDDA = 3.0–3.6V, TA = –40° to +120°C, CL ≤ 50pF, fop = 120MHz Parameter Symbol Min Typ Max Units SCK frequency fs — — 152 MHz SCK period3 tSCKW 66.7 — — ns SCK high time tSCKH 33.44 —— ns SCK low time tSCKL 33.44 —— ns Output clock rise/fall time — — 4 — ns Delay from SCK high to SC2 (bl) high - Slave5 tTFSBHS -1 — 29 ns Delay from SCK high to SC2 (wl) high - Slave5 tTFSWHS -1 — 29 ns tTHM tTSM tHM tSM tRFSWLM tRFSWHM tRFBLM tRFSBHM tTXHIM tTXNVM tTXVM tTXEM tTFSWLM tTFSWHM tTFSBLM tTFSBHM tSCKL tSCKW tSCKH First Bit Last Bit SCK output SC2 (bl) output SC2 (wl) output STD SC0 output SC1 (bl) output SC1 (wl) output SRD |
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