TCS3430 datasheet(13/38 Pages) OSRAM

13 / 38 page

Page 12

Datasheet, Public

Document Feedback

[v3-00] 2023-Jan-18

TCS3430 − Register Description

ATIME Register (0x81)

Figure 15:

ATIME Register

The ATIME register controls the integration time of the ALS

ADCs.

The timer is implemented with a down counter with 0x00 as the

terminal count. The timer is clocked at a 2.78ms nominal rate.

Loading 0x00 will generate a 2.78ms integration time, loading

0x01 will generate a 5.56ms integration time, and so forth.

0x81: ATIME

Field

Name

Reset

Type

Description

7:0

ATIME

0x00

Integration Time. Eight bit value that specifies the integration

time in 2.78ms intervals. 0x00 indicates 2.78ms, 0x01 indicates

5.56ms.

The maximum ALS value depends on the integration time. For

every 2.78ms, the maximum value increases by 1024. This means

that to be able to reach ALS full scale, the integration time has to be

at least 64*2.78ms.

Value

Integration

Cycles

Integration

Time

Maximum ALS

Value

0x00

2.78ms

1023

0x01

5.56ms

2047

...

0x11

50ms

18431

0x40

181ms

65535

...

0xff

256

711ms

65535

TCS3430 Folha de dados(PDF) 13 Page - OSRAM GmbH

TCS3430 Folha de dados(HTML) 13 Page - OSRAM GmbH

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38

Folha de dados Download

Ligação URL