AS7225 datasheet(38/76 Pages) OSRAM

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AS7225

Datasheet

• PUBLIC

DS000496

• v2-00 • 2019-Jun-28

│ 37

10.2.9

Director Control Register (Address 0x61)

Figure 35:

DIR_CTRL Register

Addr: 0x61

DIR_CTRL

Bit

Bit Name

Default

Access

Bit Description

START

R/W

1 = Host MCU has

completed last directive and

is ready for new AS7225

conversion start.

Cleared by AS7225

automatically when PWM

target values are ready for

the MCU or after a device

reset.

10.2.10

Director Channel_1 Result Registers (Addresses 0x62, 0x63)

These byte registers are used together as DIR_CH_1_H: DIR_CH_1_L.

In Color Tuning operation, the registers create a 16-bit integer value from 0 to 65535 representing a

PWM (Color + Dimming) tuning percentage between 0.00 and 100.00%.

Example: 0001101001001111 = 1A4F = 6735 = 10.28%

In Daylighting operation, the registers create a 16-bit integer value from 0 to 65535 representing a

PWM Lux tuning percentage between 0.00 and 100.00%.

Figure 36:

Director Channel_1 Result Register High

Addr: 0x62

DIR_CH_1_H

Bit

Bit Name

Default

Access

Bit Description

15:8

DIR_CH_1_H

00000000

Channel 1 high byte

CHAN_MODE 0 = Dimming

CHAN_MODE 1 = Dimming

CHAN_MODE 2 = Overall

brightness (only for

information)

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