PCB2421 datasheet(16/24 Pages) PHILIPS

16 / 24 page

1997 Apr 01

Philips Semiconductors

Preliminary speciﬁcation

1K dual mode serial EEPROM

PCB2421

11 APPLICATION INFORMATION

11.1

Diode protection

There is no diode connection between VCLK and VDD,

SCL and VDD and SDA and VDD (see Fig.14). This allows

powering-down the device without affecting the I2C-bus

operation or loading the VCLK driver.

11.2

Functional compatibility with microchip

24CL21 dual mode EEPROM

The Philips PCB2421 is pin and function compatible with

the 24CL21 providing the following measures are taken in

the application.

1. Pin 1 (TEST) must be tied to VDD

2. Pin 3 (WP) must be tied to VDD. This inhibits the write

protection function which does not exist on the 24CL21

at this time

3. Maximum 100 kHz DDC2B clock frequency

4. Maximum 25 kHz DDC1 VCLK clock frequency

5. During EEPROM programming a maximum write time

of 20 ms must be observed

6. 8-byte maximum during page write must be observed

7. During operation VDD must be between 4.5 and 5.5 V

8. An operating temperature between 0 and +70

°C must

be observed

9. Output valid from VCLK (tVAA) typical 1 µs must be

observed

10. DDC1 mode power-up time (tVPU) typical 5 µs should

be observed.

Remark: VCLK is ‘don’t care’ in the DDC2B mode.

Fig.14 PCB2421 diode protection.

handbook, halfpage

MBG284

SCL

SDA

n.c.

VDD

VSS

VCLK

TEST

substrate

PCB2421

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