ADL5507ACBZ-R7 datasheet(28/34 Pages) AD

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Data Sheet

ADL5507

THEORY OF OPERATION

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Rev. 0 | 28 of 34

The ADL5507 is a logarithmic detector (log amp), based on

the principle of successive compression. It is fabricated on an

advanced BiCMOS process. It comes in a smaller 0.8 mm × 1.2

mm WLCSP package and offers 12 GHz RF bandwidth. Functional

Block Diagram shows the main features of the ADL5507 in block

schematic form.

The ADL5507 combines two key functions needed for the measure-

ment of signal level over a moderately wide dynamic range. First,

it provides the amplification needed to respond to small signals in

a chain of four amplifier/limiter cells, each having a small signal

gain of 13 dB and a bandwidth of approximately 12 GHz. At the

output of each amplifier stage is a full wave rectifier, essentially a

square law detector cell that converts the RF signal voltages to a

fluctuating current with an average value that increases with signal

level. A further passive detector stage is added preceding the first

stage. Therefore, there are five detectors, each separated by 13

dB, giving about 52 dB of total gain and approximately 55 dB of

dynamic range. The overall accuracy at the extremes of this total

range, viewed as the deviation from an ideal logarithmic response,

that is, the log conformance error, can be judged by referencing

the figure in the Typical Performance Characteristics section, which

show that errors across the central 55 dB are moderate. These

figures show how the conformance to an ideal logarithmic function

varies with temperature, frequency, and supply voltage.

The output of these detector cells is in the form of a differential

current, making their summation a simple matter. It can easily be

shown that such summation closely approximates a logarithmic

function. The summed differential current polarity can be swapped

(thereby changing the slope polarity) by setting the ENBL pin

voltage to VPOS/2 (or floating) for negative slope or VPOS for

positive slope. This result is then converted to a voltage at the

VLOG pin through a high gain stage. This output is connected back

to a voltage-to-current (V-to-I) stage, in such a manner that VVLOG

is a logarithmic measure of the RF input voltage with a slope and

intercept controlled by the design. For a fixed termination resistance

at the input of the ADL5507, a given voltage corresponds to a

certain power level.

The external termination added before the ADL5507 determines the

effective power scaling. This often takes the form of a simple resis-

tor (51 Ω provides a net 50 Ω input), but more elaborate matching

networks can be used. This impedance determines the logarithmic

intercept, the input power for which the output crosses the baseline

(VVLOG = 0 V) if the function were continuous for all values of input.

Because this is never the case for a practical log amp, the intercept

refers to the value obtained by the minimum error, straight line fit

to the actual graph of VVLOG vs. input power. The quoted values

in Specifications assume a sinusoidal (CW) signal. In the place

of complex modulation, as in 5G-NR, the calibration of the power

response needs to be adjusted accordingly. Where a true power

(waveform independent) response is needed, consider the use of

an rms responding detector, such as the ADL5906.

However, in terms of the logarithmic slope, the amount by which

the output VVLOG changes for each decibel of input change (voltage

or power), is, in principle, independent of waveform or termination

impedance. In practice, it usually falls off at higher frequencies

because of the declining gain of the amplifier stages and other

effects in the detector cells. The ADL5507, at 3.6 GHz, has a typical

slope of 18.7 mV/dB in Positive Slope mode, and −18.7 mV/dB in

Negative Slope mode. These values are sensibly independent of

temperature and almost completely unaffected by supply voltages

of 2.7 V to 3.45 V.

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