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WM8216SEFL/R Folha de dados(PDF) 13 Page - Wolfson Microelectronics plc

Nome de Peças WM8216SEFL/R
Descrição Electrónicos  60MSPS 10-bit 2-channel CCD Digitiser
PDF  27 Pages
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Fabricante Electrônico  WOLFSON [Wolfson Microelectronics plc]
Página de início  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8216SEFL/R Folha de dados(HTML) 13 Page - Wolfson Microelectronics plc

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WM8216
Production Data
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PD Rev 4.0 March 2007
13
Figure 7 RLC Clamp Control Options
When an input waveform has a stable reference level on every pixel it may be desirable to clamp
every pixel during this period. Setting CLMPCTRL=0 means that the RLC switch is closed whenever
the RSMP input pin is high, as shown in Figure 8.
MCLK
VSMP
RSMP
RLC switch control
"CLMP"
(RLCEN=1,CLMPCTRL=0)
RLC switch closed
when RSMP=1
Video sample taken on
fallling edge of VSMP
Reset/reference sample taken
on fallling edge of RSMP
INPUT VIDEO
SIGNAL
reference
("black") level
video level
Figure 8 Reset Level Clamp Operation (CLMPCTRL=0), CDS operation shown, non-CDS also possible
In situations where the input video signal does not have a stable reference level it may be necessary
to clamp only during those pixels which have a known state (e.g. the dummy, or “black” pixels at the
start or end of a line on most image sensors). This is known as line-clamping and relies on the input
capacitor to hold the DC level between clamp intervals. However, it should be noted that in non-CDS
mode, this method of operation will result in a slow drift in the output codes. In non-CDS mode
(CDS=0) line clamping can be done directly by controlling the RSMP input pin to go high during the
black pixels only.
Alternatively it is possible to use RSMP to identify the black pixels and enable the clamp at the same
time as the input is being sampled (i.e. when VSMP is high and RSMP is high).
This mode is
enabled by setting CLMPCTRL=1 and the operation is shown in Figure 9.



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