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SP810EK-2-3 Folha de dados(PDF) 5 Page - Sipex Corporation

Nome de Peças SP810EK-2-3
Descrição Electrónicos  3 Pin Microprocessor Supervisor Circuit
PDF  8 Pages
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Fabricante Electrônico  SIPEX [Sipex Corporation]
Página de início  http://www.sipex.com
Logo SIPEX - Sipex Corporation

SP810EK-2-3 Folha de dados(HTML) 5 Page - Sipex Corporation

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Date: 5/02/06 Rev B
SP809/810, 3 Pin Microprocessor Supervisor Circuit
© Copyright 2006 Sipex Corporation
PIN DESCRIPTION
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µP will be activated at a valid reset state.
These µP supervisory circuits assert reset to
prevent code execution errors during power-
up, power-down, or brownout conditions.
Reset is guaranteed to be a logic low for
V
TH>VCC>0.9V. Once VCC exceeded the reset
threshold, an internal timer keeps RESET low
for the reset timeout period; after this interval,
RESET goes high.
If a brownout condition occurs (V
CC drops
below the reset threshold), RESET goes low.
Any time V
CC goes below the reset threshold,
the internal timer resets to zero, and RESET
goes low. The internal timer is activated after
V
CC returns above the reset threshold, and
RESET remains low for the reset timeout
period.
DETAILED DESCRIPTION
Benefits of Highly Accurate Reset
Threshold
SP809/810 with specified voltage as 5V±10%
or 3V±10% are ideal for systems using a
5V±5% or 3V±5% power supply. The reset is
guaranteed to assert after the power supply
falls below the minimum specified operating
voltage range of the system ICs. The
pretrimmed thresholds are reducing the range
over which an undesirable reset may occur.
APPLICATION INFORMATION
Negative-Going V
CC Transients
In addition to issuing a reset to the µP during
power-up, power-down, and brownout condi-
tions, SP809 series are relatively resistant to
short-duration negative-going V
CC transient.
Ensuring a Valid Reset Output Down to
VCC= 0
When V
CC falls below 0.9V, SP809 RESET
output no longer sinks current; it becomes
an open circuit. In this case, high-imped-
ance CMOS logic inputs connecting to
RESET can drift to undetermined voltages.
Therefore, SP809/810 with CMOS is
perfect for most applications of V
CC down to
0.9V.
However in applications where RESET
must be valid down to 0V, adding a pull-
down resistor to RESET causes any
leakage currents to flow to ground, holding
RESET low.
Interfacing to
µP with Bidirectional
Reset Pins
The RESET output on the SP809N is open
drain, this device interfaces easily with µPs
that have bidirectional reset pins. Connect-
ing the µP supervisor's RESET output
directly to the microcontroller's RESET pin
with a single pull-up resistor allows either
device to assert reset.



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