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AS7343

Datasheet

• PUBLIC

DS001046

• v6-00 • 2023-Jun-07

│ 29

Addr: 0x83

WTIME

Bit

Bit Name

Default

Access

Bit Description

0x01

5.56 ms

2.78 ms x (n+1)

0xff

256

711 ms

FD_TIME Register (Address 0xE0, 0xE2)

The register FD_Time_1 and FD_Time_2 can be used to configure the integration time and gain (ADC

5) of the flicker detection independently from the other ADCs. The FD_TIME register is an 11-bit

(register 0x80) must be set to “1” in order to use the FD_TIME registers. If the bit FDEN is not set,

ADC5 runs automatically with the same gain and integration time as ADC0 to ADC4.

Equation 3: Calculating the flicker detection integration time

��_�� = ��_�� × 2.78 µ��

Figure 29:

FD_Time_1 Register

Addr: 0xE0

FD_TIME_1

Bit

Bit Name

Default

Access

Bit Description

7:0

FD_TIME [7:0]

0110 0111

LSB of flicker detection integration time.

Note: Must not be changed during FDEN = 1 and

PON = 1.

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