SL1461
9
AGC
2.0
1.5
1.0
0.5
–70
–60
–50
–40
–30
–20
–10
0
VCC
VOLTAGE
RF INPUT LEVEL (dBm) UNMODULATED
Fig.9 SL1461 AGC output voltage for differing values of AGC bias resistor
OUTPUT
AGC BIAS RESISTOR 5.1K
AGC BIAS CURRENT 297
mA
AGC LOAD RESISTOR 3.9K
AGC BIAS RESISTOR 10.5K
AGC BIAS CURRENT 150
mA
AGC LOAD RESISTOR 4.7K
AGC BIAS RESISTOR 32K
AGC BIAS CURRENT 52
mA
AGC LOAD RESISTOR 10K
= 5.0 VOLTS
APPLICATION NOTES
Capture range
Under conditions when there is no RF input signal present,
the SL1461 may react to spurious radiation from the free
running oscillator coupling into the RF inputs. Because of the
constant phase error between the VCO input to the phase
detector and the spuriously coupled signal via the RF input,
the phase comparator will drive the control voltage to either the
bottom or the top of the range.
In such a case, the capture range will be asymmetrical
about the VCO free running frequency, since any control
voltage will only be able to tune the VCO in one direction if the
tuning voltage is already at the max or min.
This effect can be avoided by driving the RF input
differentially or achieving good common mode rejection to the
VCO signal.
The lock range is independant of the above effects and will
be symmetric about the centre of the phase detector S–curve
provided the VCO is correctly aligned.
EXAMPLE
Loop out of lock
Tuning voltage =4.3V (maximum)
frequency =520MHz (maximum
It is only possible to capture signals below this frequency since
the VCO is already at its maximum frequency.
Testing of capture range should be done with the device
operating under normal conditions. An input signal of between
–35dBm to –10dBm is suitable for such a measurement.
Lock range
Lock range should be symmetric about the centre of the
S–curve. When the oscillator is sitting in the centre of the
S–curve, the two video outputs will be at the same DC voltage.
RF oscillator design
The standard application circuit for the SL1461 is shown in
Fig.3 The layout of the VCO tank should follow normal good
RF techniques – ie as compact as possible. This will minimise
parasitics, thus giving improved VCO linearity and stability.
The PCB layout used for testing purpose is shown in Fig. 11.
Setting up of oscillator
The VCO should be set up so that the desired input RF
frequency is at the centre of the lock range. This will coincide
with the centre of the S–curve and the point at which the AFC
toggles when set to zero deadband.
The easiest way to centralise the VCO is to input an RF
carrier which is being modulated by a low frequency
squarewave. The tuning coil(s) should be adjusted until the
AFC voltage toggles between 0.2V and VCC–0.7V. The smaller
the FM deviation of the squarewave used, the more accurate
the setting will be.
A pre–emphasised video input containing black to white
transitions can also be used for this setting, since the DC
content in a pre–emphased video is much less than that in non
pre–emphasised video. This is important as any dc content in
the input waveform will introduce an offset in the AFC transition
point.
The setting can be confirmed by measuring the DC voltage
on the two video outputs, the voltages should be the same
when the oscillator is centred around the incoming frequency.
This DC measurement must be carried out with an
unmodulated carrier of the required frequency. Modulation
must not be present, since by definition, the dc voltages would
be changing, thus making accurate measurement difficult.
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