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NET2272 Folha de dados(PDF) 14 Page - List of Unclassifed Manufacturers

Nome de Peças NET2272
Descrição Electrónicos  USB 2.0 Peripheral Controller
PDF  102 Pages
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Fabricante Electrônico  ETC2 [List of Unclassifed Manufacturers]
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Specification
NET2272 USB Peripheral Controller
______________________________________________________________________________
 NetChip Technology, Inc., 2003
Patent Pending
335 Pioneer Way, Mountain View, California 94041
TEL (650) 526-1490
FAX (650) 526-1494
http://www.netchip.com
Rev 1.2, October 15, 2003
14
1.5.2.3 Analog VSS (ground)
Analog ground must be filtered from the digital ground using the recommended circuit provided.
Analog VSS and digital VSS must be connected via a 1
µH inductor.
AVSS, PVSS, COM pins, and RREF’s resistor should be connected to analog VSS.
1.5.2.4 Decoupling Capacitors
At least one 0.1
µF decoupling capacitor for every two pairs of digital/analog VDD and VSS should be
located near the NET2272 device.
At least one 0.01
µF decoupling capacitor for every two pairs of digital/analog VDD and VSS should be
located near the NET2272 device.
Decoupling capacitors may be placed on the solder side of the PCB.
At least one 10
µF filter capacitor for every five 0.1µF or 0.01µF decoupling capacitors.
Use capacitors that have good quality at high frequency for low ESR, such as tantalum or ceramic
capacitors. Do not use electrolytic capacitors.
1.5.2.5 EMI Noise Suppression
A common-mode choke coil may suppress EMI noise effectively, although such a coil could affect USB
2.0 signal quality.
Choose a good quality noise filter, if necessary.
For a typical implementation, a choke is not required.
Use good quality, shielded cables.
1.6
Terminology
Byte. 8-bit quantity of data.
Word. 16-bit quantity of data.
Scalar. Multi-byte data element.
Local Transaction. A read or write operation on the local bus. It includes an address phase followed by one data
transfer.
Local Transfer. During a transfer, data is moved from the source to the destination on the local bus.
Clock cycle. One period of the internal 60 MHz clock.
Big Endian. The most significant byte in a scalar is located at address 0.
Little Endian. The least significant byte in a scalar is located at address 0.



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