WM8987LGECOSLASHV datasheet(11/58 Pages) WOLFSON

Nome de Peças	WM8987LGECO/V

Descrição Electrónicos	Stereo CODEC for Portable Audio Applications

PDF	58 Pages

Scroll/Zoom	100%

Fabricante Electrônico	WOLFSON [Wolfson Microelectronics plc]

Página de início	http://www.wolfsonmicro.com

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11 / 58 page

Pre-Production

WM8987L

PP Rev 3.0 January 2007

SIGNAL TIMING REQUIREMENTS

SYSTEM CLOCK TIMING

MCLK

MCLKL

MCLKH

MCLKY

Figure 1 System Clock Timing Requirements

Test Conditions

CLKDIV2=0, DCVDD = 1.42V, DBVDD = 3.3V, DGND = 0V, TA = +25

oC, Slave Mode fs = 48kHz, MCLK = 384fs, 24-bit data,

unless otherwise stated.

PARAMETER

SYMBOL

MIN

TYP

MAX

UNIT

System Clock Timing Information

MCLK System clock pulse width high

TMCLKL

MCLK System clock pulse width low

TMCLKH

MCLK System clock cycle time

TMCLKY

MCLK duty cycle

TMCLKDS

60:40

40:60

Test Conditions

CLKDIV2=1, DCVDD = 1.42V, DBVDD = 3.3V, DGND = 0V, TA = +25

oC, Slave Mode fs = 48kHz, MCLK = 384fs, 24-bit data,

unless otherwise stated.

PARAMETER

SYMBOL

MIN

TYP

MAX

UNIT

System Clock Timing Information

MCLK System clock pulse width high

TMCLKL

MCLK System clock pulse width low

TMCLKH

MCLK System clock cycle time

TMCLKY

AUDIO INTERFACE TIMING – MASTER MODE

BCLK

(Output)

ADCDAT

ADCLRC/

DACLRC

(Outputs)

DACDAT

DDA

DHT

DST

Figure 2 Digital Audio Data Timing – Master Mode (see Control Interface)

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