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MPC850 Folha de dados(PDF) 59 Page - Freescale Semiconductor, Inc |
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MPC850 Folha de dados(HTML) 59 Page - Freescale Semiconductor, Inc |
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59 / 72 page  MPC850 PowerQUICC™ Integrated Communications Processor Hardware Specifications, Rev. 2 Freescale Semiconductor 59 CPM Electrical Characteristics 8.10 SPI Slave AC Electrical Specifications Table 23 provides the SPI slave timings as shown in Figure 59 and Figure 60. Table 23. SPI Slave Timing Num Characteristic All Frequencies Unit Min Max 170 Slave cycle time 2 — tcyc 171 Slave enable lead time 15.00 — ns 172 Slave enable lag time 15.00 — ns 173 Slave clock (SPICLK) high or low time 1 — tcyc 174 Slave sequential transfer delay (does not require deselect) 1 — tcyc 175 Slave data setup time (inputs) 20.00 — ns 176 Slave data hold time (inputs) 20.00 — ns 177 Slave access time — 50.00 ns 178 Slave SPI MISO disable time — 50.00 ns 179 Slave data valid (after SPICLK edge) — 50.00 ns 180 Slave data hold time (outputs) 0.00 — ns 181 Rise time (input) — 15.00 ns 182 Fall time (input) — 15.00 ns |
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