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MB95F118MS Folha de dados(PDF) 56 Page - fujitsu semiconductor |
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MB95F118MS Folha de dados(HTML) 56 Page - fujitsu semiconductor |
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56 / 64 page ![]() MB95110M Series 56 (2) Notes on Using A/D Converter • About the external impedance of analog input and its sampling time A/D converter with sample and hold circuit. If the external impedance is too high to keep sufficient sampling time, the analog voltage charged to the internal sample and hold capacitor is insufficient, adversely affecting A/ D conversion precision, Therefore, to satisfy the A/D conversion precision standard, consider the relationship between the external impedance and minimum sampling time and either adjust the register value and operating frequency or decrease the external impedance so that the sampling time is longer than the minimum value. Also, if the sampling time cannot be sufficient, connect a capacitor of about 0.1 µF to the analog input pin. • About errors As |AVCC − AVSS| becomes smaller, values of relative errors grow larger. R C Analog input Note : The values are reference values. • Analog input equivalent circuit RC 4.5 V ≤ AVcc ≤ 5.5 V 2.0 k Ω (Max) 16 pF (Max) 4.0 V ≤ AVcc < 4.5 V 8.2 k Ω (Max) 16 pF (Max) Comparator During sampling : ON 0 2 46 8 10 12 14 0 10 20 30 40 50 60 70 80 90 100 AVCC ≥ 4.5 V AVCC ≥ 4.0 V 01 23 4 0 2 4 6 8 10 12 14 16 18 20 AVCC ≥ 4.5 V AVCC ≥ 4.0 V (External impedance = 0 kΩ to 100 kΩ) (External impedance = 0 kΩ to 20 kΩ) Minimum sampling time [ µs] Minimum sampling time [ µs] • The relationship between external impedance and minimum sampling time |
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