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Os motores de busca de Datasheet de Componentes eletrônicos |
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Os motores de busca de Datasheet de Componentes eletrônicos |
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ISL81601 Folha de dados(PDF) 46 Page - Renesas Technology Corp |
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ISL81601 Folha de dados(HTML) 46 Page - Renesas Technology Corp |
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46 / 54 page  FN9299 Rev.3.1 Page 46 of 53 May 27, 2021 ISL81601 7. Layout Guidelines (12) Use a pair of traces with minimum loop for the input or output current sensing connection. (13) Ensure the feedback connection to the output capacitor is short and direct. 7.2 General EPAD Design Considerations Figure 56 illustrates how to use vias to remove heat from the IC. Figure 56. PCB Via Pattern Fill the thermal pad area with vias. A typical via array fills the thermal pad footprint so that their centers are three times the radius apart from each other. Keep the vias small but not so small that their inside diameter prevents solder wicking through during reflow. Connect all vias to the ground plane. The vias must have a low thermal resistance for efficient heat transfer. Ensure a complete connection of the plated through hole to each plane. |
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