HC705CT4GRSSLASHD datasheet(69/152 Pages) NXP

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MC68HC705CT4 — Rev. 2.0

General Release Specification

MOTOROLA

Synchronous Serial Interface (SSI)

General Release Specification — MC68HC705CT4

Section 9. Synchronous Serial Interface (SSI)

9.1 Contents

9.2

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .69

9.3

Signal Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .71

9.3.1

Serial Clock (SCK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .71

9.3.2

Serial Data In/Out (SDIO) . . . . . . . . . . . . . . . . . . . . . . . . . .71

9.4

SSI Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .72

9.4.1

SSI Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .72

9.4.2

SSI Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75

9.4.3

SSI Data Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .76

9.5

Operation During Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . .76

9.6

Operation During Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . .76

9.7

SSI Power Supply Source . . . . . . . . . . . . . . . . . . . . . . . . . . . .77

9.2 Introduction

The synchronous serial interface (SSI) is a 2-wire master/slave system

including serial clock (SCK) and serial data input/output (SDIO). Data is

transferred eight bits at a time. A software programmable option

determines whether the SSI transfers data most significant bit (MSB) or

least significant bit (LSB) first and an interrupt may be generated at the

completion of each transfer. When operating as a master device, the

serial clock speed is selectable from a choice of four rates.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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