HC705C9AGRSSLASHD datasheet(65/157 Pages) NXP

65 / 157 page

General Release Specification

Port C

MC68HC705C9A — Rev. 2.0

Input/Output Ports

7.5 Port C

Port C is an 8-bit bidirectional port. The port C data register is at $0002

and the data direction register (DDR) is at $0006. The contents of the

port C data register are indeterminate at initial powerup and must be

initialized by user software. Reset does not affect the data registers, but

clears the data direction registers, thereby returning the ports to inputs.

Writing a one to a DDR bit sets the corresponding port bit to output

mode. PC7 has a high current sink and source capability. Figure 7-1 is

also applicable to port C.

7.6 Port D

When configured as a C9A, port D is a 7-bit bidirectional port; when

configured as a C12A, port D is a 7-bit fixed input port. Four of its pins

are shared with the SPI subsystem and two more are shared with the

SCI subsystem. The contents of the port D data register are

indeterminate at initial powerup and must be initialized by user software.

During reset all seven bits become valid input ports because the C9A

DDR bits are cleared and the special function output drivers associated

with the SCI and SPI subsystems are disabled, thereby returning the

ports to inputs. Writing a one to a DDR bit sets the corresponding port

bit to output mode only when configured as a C9A.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC705C9AGRS/D Folha de dados(PDF) 65 Page - NXP Semiconductors