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HMLQ25201T-R47MSR Folha de dados(PDF) 25 Page - Renesas Technology Corp

Nome de Peças HMLQ25201T-R47MSR
Descrição Electrónicos  High Current, Highly Configurable System PMIC with Four Bucks and One LDO
PDF  52 Pages
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Fabricante Electrônico  RENESAS [Renesas Technology Corp]
Página de início  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HMLQ25201T-R47MSR Folha de dados(HTML) 25 Page - Renesas Technology Corp

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DA9080
High Current, Highly Configurable System
PMIC with Four Bucks and One LDO
Datasheet
Revision 1.2
08-Feb-2022
CFR0011-120-00
25 of 51
© 2022 Renesas Electronics
Once the output voltage discharge ramp is finished, and after a suitable delay, the slot is completed
and the sequencer moves to slot three and repeats the process. When all slots are complete, the
power-down sequence is finished.
The startup and shutdown sequencers may be triggered by register write. The FORCE_DISABLE
register bit will shut down the regulators if written high whilst the chip is enabled. When using this
register care should be taken that the regulators are not also disabled by writing their individual
enable registers: The FORCE DISABLE register is located in the same register bank as the individual
regulator enable bits (EN1/2/3/4/L) If the regulator enables are set low when FORCE_DISABLE is
used then the regulators will not restart when FORCE_DISABLE is cleared.



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