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MPZ2012S221A Folha de dados(PDF) 2 Page - STMicroelectronics |
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MPZ2012S221A Folha de dados(HTML) 2 Page - STMicroelectronics |
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2 / 56 page ![]() 1 Pin configuration Figure 1. Pin connection (top view) 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 E.P. VIN VINLDO AGND EN/CLKIN(*) VCC AGND BOOT VIN 1 Table 1. Pin description Pin n° Symbol Function 1 VIN DC input voltage 2 VINLDO DC input voltage connects to the supply rail with a simple RC filter. 3 AGND Analog ground 4 EN / CLKIN Enable pin with internal voltage divider. Pull down/up to disable/ enable the device. This pin is also used to provide an external clock signal, which synchronizes the device. 5 PGOOD The PGOOD open collector output is driven to low impedance when the output voltage is out of regulation and released once the output voltage becomes valid. 6 VBIAS Typically connected to the regulated output voltage, an external voltage source can be used to supply part of the analog circuitry to reduce current consumptions at light load. Connect to AGND if not used. 7 FB FB is output voltage sensing with external voltage divider. 8 FSW Connect an external resistor to program the oscillator frequency and enable optional dithering. 9 VCC This pin supplies the embedded analog circuitry. Connect a ceramic capacitor (≥ 1 μF) to filter internal voltage reference. 10 AGND Analog ground L6983I Pin configuration DS14040 - Rev 1 page 2/56 |
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