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ISO808ATR Folha de dados(PDF) 24 Page - STMicroelectronics |
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ISO808ATR Folha de dados(HTML) 24 Page - STMicroelectronics |
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24 / 38 page ![]() 9 Reverse polarity on VDD The reverse polarity on VDD can be implemented on board by placing a diode between the GNDDD pin and GND digital ground. The diode must be chosen by taking into account VRRM>|VDD| and its power dissipation capability: PD≥IDD×VF (4) Note: In normal operation (no reverse polarity), there is a voltage drop (ΔV = VF@(Idd)) between GNDDD of the device and digital ground of the system. In order to guarantee to proper triggering of the input signal, ΔV(max.) must result lower than VIH(MIN). Figure 24. VDD reverse polarity protection Note: Input(i) is intended as any input pin on logic side. ISO808A, ISO808A-1 Reverse polarity on VDD DS14170 - Rev 1 page 24/38 |
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