93LC86ATESTG datasheet(7/28 Pages) MICROCHIP

Nome de Peças	93LC86ATESTG

Descrição Electrónicos	16K Microwire Compatible Serial EEPROM

PDF	28 Pages

Scroll/Zoom	100%

Fabricante Electrônico	MICROCHIP [Microchip Technology]

Página de início	http://www.microchip.com

Logo

7 / 28 page

DS21797G-page 7

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C

2.4

Erase

The ERASE instruction forces all data bits of the

specified address to the logical ‘1’ state. The rising

edge of CLK before the last address bit initiates the

write cycle.

The DO pin indicates the Ready/Busy status of the

device if CS is brought high after a minimum of 250 ns

low (TCSL). DO at logical ‘0’ indicates that programming

is still in progress. DO at logical ‘1’ indicates that the

the device is ready for another instruction.

FIGURE 2-1:

ERASE TIMING

Note:

After the Erase cycle is complete, issuing

a Start bit and then taking CS low will clear

the Ready/Busy status from DO.

CLK

TCSL

Check Status

AN-1

AN-2

•••

TSV

TCZ

Busy

Ready

High-Z

TWC

High-Z

93LC86ATESTG Folha de dados(PDF) 7 Page - Microchip Technology