DRA821U2...ALM datasheet(220/252 Pages) TI

220 / 252 page

8 Detailed Description

8.1 Overview

Jacinto™ DRA821x processors, based on the Armv8 64-bit architecture, are System-on-Chip (SoCs) that provide

lower system cost through integration of features including system MCU, Ethernet switch, safety, security. Multi-

core system enables ECU consolidation for automotive applications such as automotive gateway and vehicle

compute systems. The integrated diagnostics and functional safety features are targeted to ASIL-D certification/

requirements. The Integrated Microcontroller (MCU) island eliminates the need for an external system MCU.

In addition to the PCIe hub, the device features up to four Gigabit Ethernet ports with integrated switch to

meet networking use cases that require heavy data bandwidth and also includes PCIe hub functionality. Twenty

CAN-FD and up to twelve UART interfaces are available on the device. Up to four general purpose Arm®

Cortex®-R5F subsystems can handle low level, timing critical processing tasks and leave the Arm® Cortex®-

A72’s unencumbered for advanced applications.

Note

For more information on features, subsystems, and architecture of superset device System on Chip

(SoC), see the device TRM.

DRA821U-Q1

SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022

www.ti.com

220

Submit Document Feedback

Product Folder Links: DRA821U-Q1

DRA821U2...ALM Folha de dados(PDF) 220 Page - Texas Instruments